|
Computer Architecture Training
Purpose：To understand the technology required the practical application of the latest multi-core heterogeneous.
It is said that the need to "co-design architecture / algorithm", in order to pursue the performance of the processor. For multi-core, the importance of software has been becoming increasingly more particularly.
Training in this course, from the perspective of computer architecture, a deep understanding of technology hardware and software to configure the system, understand the number of techniques for high performance and low power consumption can be used for actual design the goal is to. Furthermore, it is the direction of the two major multi-core about "heterogeneous multi-core" and "homogeneous multi-core", explains the advantages of each, and how to solve that problem, will be discussed.
Training of this course, do the "brainstorming" "Q & A", "Remarks" item for each technology.
Configuration of the training courses
1．Done on customers site
2．The base configuration, 6 hour/once × 7 days (once a week)
3．Upon request of the customer, we will adjust the content and duration.
Schedule of training courses (for example)
| |
|
Theme |
Lecturer |
Content |
| First day |
AM |
History and prospects of computer architecture |
Nakamura |
Outlines the research results and future outlook of basic computer architecture and state-of-the-art, discuss |
| PM |
Computer Architecture Overview |
Matsumoto |
About computer architecture, an overview of the technology of each element is divided into a hierarchy of hardware and software to configure the system, discuss |
| Second day |
AM |
Computer Architecture (software) |
Matsumoto |
Algorithms, programming language, OS, compilers, an overview from the perspective of architecture, to discuss |
| PM |
Computer Architecture (hard) |
Matsumoto |
Outlines the instruction set architecture, interrupt / exception processing, memory management, to discuss |
| Third day |
AM |
Computer Architecture (hard) |
Matsumoto |
outlines the micro-architecture and discuss(Pipelines, bus, memory hierarchy, branch prediction mainly, memory management) |
| PM |
Computer Architecture (hard) |
Matsumoto |
Outlines the various arithmetic unit for a total of logic and control, to discuss(ALU, shifter, multiplier, divider) |
| Fourth day |
AM |
Challenges and solutions for improving the performance |
Matsumoto |
A variety of high-performance microprocessor techniques outlines and discuss
(pipelining, instruction extensions, cache, branch prediction, LP, a multi-threaded, re-configuration) |
| PM |
| Fifth day |
AM |
Challenges and solutions of low power consumption
|
Matsumoto |
Technology for low power consumption, an overview of the writing system technique, algorithms, architecture, microarchitecture, logic, circuit, on the device, to discuss |
| PM |
| Sixth day |
AM |
Challenges and solutions of multi-core processors
|
Matsumoto |
Centered on homogeneous (SMP), its issue and solution describes the hardware and software technology of multi-core processor (language, OS, compiler), and case development, to discuss
|
| PM |
| Seventh day |
AM |
Challenges and solutions of heterogeneous multi-core |
Matsumoto |
Centered on heterogeneous (AMP), its issue and solution describes the hardware and software technology of multi-core processor (language, OS, compiler), and case development, to discuss |
| PM |
※ In addition to that, we have also conducted training on compiler technology and DSP.
|
|
