TOPSTREAM™ Technology Overview

What is TOPSTREAM™?

Task Oriented Parallel Stream (TOPSTREAM™) is a next-generation microprocessor technology that models efficient distributed computing system. The TOPSTREAM™ distributed system consists of multiple autonomous processor cores that communicate through the on-chip hierarchical network. The processor cores interact with each other in order to achieve a common goal. The computer program that runs in the TOPSTREAM™ distributed system is organized as a Kahn Process Network (KPN), and the distributed programming is done through the process of software partitioning from legacy sequential programs.

Background technologies of TOPSTREAM™

TOPS Systems Corp. has started its R&D based on plenty of expertise on developing conventional microprocessors, such as x86 microprocessors, DSPs, distributed controllers, and Reconfigurable processors, and developed TOPSTREAM™ Architecture. We continue intensive R&D on core technologies for next-generation embedded systems.

Technologies of TOPS Systems Corporation.

We have developed a wide range of technologies. We have been filed more than 20 patents.

Ø  Computer Architecture

■TOPSTREAM™ Architecture solves three major performance issues on computers

＜Three Major Issues＞

- ILP^*1 Wall: Limitation on number of instructions that CPU can issue at a time

- Memory Wall: Speed gap between CPU and memory that increases at a rate of 50% a year

- Power Wall: CPU performance limited by Power Consumption

*1: Instruction Level Parallelism

　　　＜Overview of TOPSTREAM™ Architecture＞

- Distributed Stream Processing

- Heterogeneous Multi-Core processor

- On-Chip scalable Extended Harvard Architecture bus with Distributed Arbitration

- Dual Instruction Set Architecture (RISC + Data Processing ISA) with 16-bit Instruction Length

- Inter-Core Shared Register-Banks

■TOPSTREAM™ Micro-Architecture drastically improves performance

　　　＜Overview of TOPSTREAM™ Micro-Architecture＞

- Simple Instruction Execution Pipeline

- Independent execution of load-store for Stream I/O and computation for kernel processing

- Zero-Overhead Loop Mechanism

- Parallel Instruction Decoder

- Multi-Banked Multi-Register-Files (General Purpose Registers and Data Registers)

- Super Complex Operation Unit

- Extended Harvard Architecture bus (Instruction bus, Data bus, and System bus)

■Logic Design to improve efficiency for performance, energy, and cost

　　　＜Logic Design of TOPSTREAM™＞

- Heterogeneous Multi-Core processor design platform

- Separation of Datapath and Control

- High Performance Complex Operation Unit

- Component-based RTL design

 ■TOPS Lib improves design efficiency

　　　＜Overview of TOPS_LIB＞

- Parameterized Vectored Component Libraries

- Truth-Table based Function Libraries

 Ø  Software

■Object-Oriented Software technologies to solve issues on software for Multi-Core processors

　　　＜Overview of Object-Oriented Software technologies＞

- Static Object Mapping

- Dynamic Object Mapping

- Micro ORB Engine

 Ø  Software Development Environment

■Compiler Technology to highly utilize resources on Multi-Core processors

＜Overview of Compiler Technologies＞

- Scheduling Algorithms for Stream Processing

- Optimization Algorithms for Microprocessor Architecture dependent optimization

■TS-ISIM Instruction Set Simulator to accelerate Software test

＜Overview of TS-ISIM Instruction Set Simulator＞

- Ultra-Fast ISS for Multi-Core processor

- Object-Oriented design to support Multiple Instruction Set Architecture

 Ø  Simulation Technologies

■Simulation technologies to enable ultra-fast simulation speed

＜Overview of Simulation Technologies＞

- Cycle based Simulation by static scheduling

- Ultra High Speed HW/SW Simulation based on TLM

- Automatic Conversion from RTL to Cycle based C model

Ø  3D-Chip Stack Technologies

■COOL Interconnect Technologies to enable scalable 3D-chip stacking

Ø  Application Technologies

■Application Technologies to enable Next-Generation Information Systems

＜Overview of Application Technologies＞

- 3D recognition technology based on stream input from a single camera inputs

- Dynamic Cryptography based Communication System